Test driving YAVGA from www.OpenCores.org

Last night I downloaded and test drove "YAVGA" (Yet Another VGA controller) from www.OpenCores.org.

I had already worked out what the VGA signals were on my DVK600 board (see previous post), so it was a simple matter to edit the supplied User Constraints File (.ucf) file for my hardware.

I tested the design against an old ViewSonic monitor I had laying around, and it worked. The characters were slightly clipped on the bottom and right edges, but until I test with more than one monitor I am going to blame the ViewSonic.

The VHDL code seemed to be pretty well structured, and I recommend you take a look if you need a VGA output or (like me) you are trying to learn VHDL by studying other's existing designs.

As a convenience, here is the edited portion of the original .ucf file to make it work with a "PS2 Keyboard + VGA Adapter" plugged into the "16I/Os 2" connector on a DVK600 with a Core3S500E daughter card plugged onto it.

#############################################################################

# Below was edited for DVK600 with VGA adapter board on 16I/Os_2

NET "i_clk"  LOC = "P184" | IOSTANDARD = LVCMOS33 ;

NET "o_b"  LOC = "p109" | IOSTANDARD = LVTTL  | DRIVE = 8  | SLEW = FAST ;

NET "o_g"  LOC = "p112" | IOSTANDARD = LVTTL  | DRIVE = 8  | SLEW = FAST ;

NET "o_hsync"  LOC = "p115" | IOSTANDARD = LVTTL  | DRIVE = 8  | SLEW = FAST ;

NET "o_r"  LOC = "p107" | IOSTANDARD = LVTTL  | DRIVE = 8  | SLEW = FAST ;

NET "o_vsync"  LOC = "p113" | IOSTANDARD = LVTTL  | DRIVE = 8  | SLEW = FAST ;

NET "i_clk" TNM_NET = i_clk;

TIMESPEC TS_i_clk = PERIOD "i_clk" 20 ns HIGH 40%;

Errors and Omissions in the User Constraints File that comes with the DVK600 VGA Adapter

Tonight I was playing around with some XILINX Spartan3 FPGA hardware I got from http://www.wvshare.com/column/XILINX_DevelopmentBoard.htm (technically I ordered it from Amazon, but WVShare is the vendor).

Anyway, I plugged up the VGA adapter and loaded up the VHDL "VGA" demo that came on the CD.

Through a series of experiments I made the following discoveries about the supplied example VHDL code:

1) The HIGH and MEDIUM intensity GREEN signals are swapped.

In the DVK600 "16 I/Os" expansion connector numbering scheme, I/O 7 is actually VGAG2 not VGAG1.
I/O 10 is actually VGAG1 not VGAG2. The existing definition for VGAG0 is correct.

2) There are 3 bits of BLUE available for use, not 2 like the demo used.

The "extra" VGAB2 signal is on I/O 12.

3) In addition to 3 bits of RED, 3 bits of GREEN, and 3 bits of BLUE there are 3 additional R, G, and B pins.

A max intensity G on I/O 5.
A max intensity B on I/O 6.
A max intensity R on I/O 8.

I thought these might make it for "4 bits for each color" but these additional pins completely swamp their other three counterparts.

My guess is you would use these additional pins in conjunction with PWM instead of using the "binary" RGB outputs?

For those not familiar with the DVK600 board, it has multiple connectors of multiple sizes (8,16,32).

They are named for the number of I/O pins they support, not for the total number of pins (which is higher due to additional power and ground pins).

There are two "16 I/O" connectors labeled "16 I/Os 1" and "16 I/Os 2". Because there are TWO connectors of this size, I used "I/O" numbering in the above discussion instead of "raw" XILINX pins.

As an example, here is how the "16 I/Os 2" pins map to XILINX pin "LOC"s...

I/O        LOC
1           p119
2           p116
3           p115
4           p113
5           p112
6           p109
7           p108
8           p107
9           p106
10         p102
11         p100
12         p99
13         p98
14         p97
15         p96
16         p94

(I have not used connector "16 I/Os 1" yet).

Here is a corrected ".ucf" file for connector "16 I/Os 2":

NET "clk"     LOC = "p184";
NET "red0"    LOC = "p96";
NET "red1"    LOC = "p98";
NET "red2"    LOC = "p100";
NET "redx"    LOC = "p107"; # Labeled "R" on silkscreen, this is a MUCH more intense RED
NET "green0"  LOC = "p106";
NET "green1"  LOC = "p102"; # They had these next two swapped!
NET "green2"  LOC = "p108"; # (see above)
NET "greenx"  LOC = "p112"; # Labeled "G" on silkscreen, this is a MUCH more intense GREEN
NET "blue0"   LOC = "p94";
NET "blue1"   LOC = "p97";
NET "blue2"   LOC = "p99";  # They left this out completely
NET "bluex"   LOC = "p109"; # Labeled "B" on silkscreen, this is a MUCH more intense BLUE

Wanting to share this prompted me to create this blog...